The three circuit design techniques that include monotonic capacitor switching procedure, binary-scaled error compensation method and binary-scaled error compensation method, are claimed to save 80% of energy in comparison to the traditional design techniques.
The monotonic capacitor switching procedure has been designed to reduce the average switching energy and total sampling capacitance by about 81.3% and 50% respectively, compared to converters which use the conventional procedure.
The binary-scaled error compensation method can improve the operating speed by compensating for the DAC settling error that limits the operating speed of a SAR ADC, and performing comparison before the DAC is completely settled.
The third technique, the binary-scaled error compensation method, which uses a predictive circuit to avoid unnecessary switching in a DAC network, is estimated to save 40% to 45% switching energy and improve static and dynamic performance of a SAR ADC.
