The µPILR interconnect platform develops and simplifies the interconnections within the semiconductor packages, substrates, printed circuit boards (PCBs) and other electronic components. The new technology reduces the total form factor in stacking of logic plus memory, flash and DRAM by utilizing low profile, pin-shaped contacts to swap conventional interconnect technologies, like solder balls on the semiconductor packages. The µPILR technology allows contacts which are up to 50% smaller in diameter and height over the solder balls. These shorter connections increase the electrical and thermal performance, offering high density routing between the contacts for increased functionality within same package footprint.
“We offer advanced technology manufacturing services and provide a complete portfolio of IC package substrates, tailored to the specific needs of our customers,” said Peter Kuo, president, Kinsus. “With Tessera’s µPILR interconnect platform, we have expanded our IC package substrate offerings to bring our customers even greater choice and superior value.”
“Tessera revolutionized the semiconductor industry with our development of chip-scale package (CSP) technology, and is now breaking new ground with our advanced µPILR interconnect technology,” said Craig Mitchell, senior vice president, Interconnect, Components and Materials (ICM), Tessera. “By addressing the technical limitations of current interconnect solutions, we believe our µPILR platform will become a fundamental building block in next-generation wireless, computing and consumer electronic products by enabling greater levels of integration and functionality.”
The µPILR Interconnect Platform:
A semiconductor package is physical and electrical interface between the semiconductor chip and system in which it operates. The µPILR pins can be utilized as internal or external interconnections in various applications, like the interconnection between semiconductor die and package substrates, semiconductor packages and printed circuit boards (PCBs), and also the layers within package substrates and PCBs.
The new µPILR technology can accommodate a wide range of semiconductor devices, from the small die with low I/O to large die with the high I/O. The devices can be packaged in a single-chip, multi-chip, package-on-package and the other configurations. The specific device applications include flash, DRAM, SRAM, application processors and baseband processors, and also other logic devices. Additionally, the platform readily addresses the challenges related with package level integration of the logic plus memory. The ability to test and burn-in each individual package before stacking allows near 100% stacked yields. The highly co-planar aspect of µPILR pins minimizes complex warpage issues commonly experienced in the package-on-package (PoP) configurations.
